An energy-efficient CMOS line driver using adiabatic switching
نویسندگان
چکیده
The energy recovery principle used in high-efficiency power supplies can be applied to digital CMOS logic to reduce dynamic power dissipation. We describe experiments with a custom linedriver chip and resonant power supply that can switch eight 100pF loads at 1MHz over 6 times more efficiently than conventional CMOS. The paper describes the adiabatic charging principle underlying this class of designs, which allows trading off switching time for increased energy efficiency. We emphasize the importance of including power supply and control logic overhead in evaluations of the net energy savings, and show how this overhead modifies the time-energy trade-off formula. The effect of non-ideal devices is also investigated. The research described in this paper was supported by the Advanced Research Project Agency under contract number DABT63-92-C-0052.
منابع مشابه
Design of power-efficient adiabatic charging circuit in 0.18μm CMOS technology
In energy supply applications for low-power sensors, there are cases where energy should be transmitted from a low-power battery to an output stage load capacitor. This paper presents an adiabatic charging circuit with a parallel switches approach that connects to a low-power battery and charges the load capacitor using a buck converter which operates in continuous conduction mode (CCM). A gate...
متن کاملSupply clock generation (driver) circuit for 2PASCL
The paper presents a new quasi adiabatic logic family that uses two complementary split-level sinusoidal power supply clock for digital low power applications such as sensors. The proposed two-phase adiabatic static CMOS logic circuit (2PASCL) is using the principle of energy recovery and adiabatic switching. It has switching activity that is lower than dynamic logic and can be directly derived...
متن کاملDESIGN AND ANALYSIS OF 4:1 MULTIPLEXER USING AN EFFICIENT REVERSIBLE LOGIC IN 180nm
Multiplexer’s square measure is a typical building block for data-paths, and is used extensively in a variety of applications together with the processors. In this paper authors have proposed a 4:1 multiplexer using PFAL and ECRL adiabatic logic design technique and compared with the Conventional CMOS Multiplexer. The basic approaches that we used for reducing energy/power dissipation in conven...
متن کاملLow-Power, Low-Noise Adder Design with Pass-transistor Adiabatic Logic
AbstraceIn this paper, the efficiency of a fully adiabatic logic circuit is compared with its combinational and pipelined static CMOS counterparts. The performance of each circuit is studied in terms of the maximum frequency of operation, the minimum voltage of operation, the circuit energy consumption, and the switching noise generated by the circuit. An 8-bit carry look-ahead adder is designe...
متن کاملEfficiency of Adiabatic Logic for Low-Power, Low-Noise VLSI
ln this paper, the efficiency of a fully adiabatic logic circuit is compared with its combinational and pipelined static CMOS counterparts. The performance of each circuit is studied in terms of the maximum frequency of operation, the minimum voltage of operation, the circuit energy consumption, and the switching noise generated by the circuit. An 8-bit carry look-ahead adder is designed using ...
متن کامل